Silicon photonics is rapidly gaining importance as a generic technology platform for a wide range of applications. Such applications include, for instance, telecom, datacom, interconnect and sensing. Silicon photonics allows implementing photonic functions through the use of CMOS compatible wafer-scale technologies on high quality, low cost silicon substrates.
However, especially for telecom applications it is difficult to meet all performance requirements, when using conventional silicon passive devices. Instead, it has been found that a dramatically improved performance can be achieved by using high quality silicon nitride (SiN) technology, which is still a CMOS compatible wafer-scale technology. As a drawback, active devices cannot be fabricated using SiN.
One option to overcome this drawback is to monolithically integrate SiN waveguides with active devices fabricated using silicon, i.e., devices formed in silicon waveguides. However, high temperatures are necessary to ensure a high quality of the SiN waveguides. This also means that the silicon active devices must be formed on top of the SiN. This typically requires at least one wafer bond operation, in order to add silicon layers of the active devices to a patterned SiN PIC wafer. To nevertheless achieve high wafer bond yields, stringent cleanliness and planarization is required, which makes the fabrication of such integrated devices difficult and expensive.
Different groups have attempted to use grating couplers, in order to transfer light between different chips, for instance, Zhang et al., in “Inter-layer grating coupler on double-layer silicon nanomembranes”, DOI: 10.1109/OIC.2013.6552911, Optical Interconnects Conference, 2013 IEEE.
However the reported coupling performance of these grating couplers is not very good, with optical losses being in the range of 8 dB. This level of optical loss is too excessive for most telecommunications applications.
Other groups have attempted to couple light between different chips using mirrors. However, the optical losses of nearly 3 dB are still unacceptable for low loss applications. Further, the fabrication of a mirror is not a CMOS compatible process.
Soganci et al. have reported, in “Flip-chip optical couplers with scalable I/O count for silicon photonics”, Jul. 1, 2013, Vol. 21, No. 13, DOI: 10.1364/OE.21.016075, Optics Express 16075 IBM, a coupling of light between inverted tapers fabricated in silicon waveguides and polymer waveguides. The polymer waveguide is provided on a PCB. Losses as low as 1 dB per optical coupler were achieved at specific wavelengths, and demonstrate the superior performance, which can be achieved using adiabatic coupling between waveguides.
Similarly, D. W. Vernooy et al. have developed, in “Alignment-Insensitive Coupling for PLC-Based Surface Mount Photonics”, IEEE PTL, 2004, a way of using adiabatic coupling between III-V chips and silica PLC. This approach enables a surface mount flip-chip of III-V components onto a PLC platform with optical losses <0.5 dB.
The III-V chip has a low index contrast output waveguide, and the light is transferred from an indium phosphide (InP) waveguide into this output waveguide. This transfer allows the mode to expand significantly, and to be coupled to a waveguide on the PLC (also of low index contrast), provided the surface mount brings them into close enough proximity.
However, the requirement for the close proximity of the waveguides requires a complex fabrication process. Normally a waveguide would be covered with a thick overclad material having a refractive index lower than a waveguide core. Removing this overclad material and stopping on the waveguide, or leaving a thin layer of the overclad material is necessary but complicated. Further, the removal leaves steps on the wafer surface of several microns height. To the contrary, accurate CMOS processing requires planar surfaces or steps of below one micron.
It has also been shown by Chen et al., in “Low-Loss and Broadband Cantilever Couplers Between Standard Cleaved Fibers and High-Index-Contrast SiN or Si Waveguides”, IEEE Photonics Technology Letters, Vol. 22, No. 23, Dec. 1, 2010, that light can be transferred from a Si or SiN waveguide into a waveguide formed by underclad and overclad silica layers. The high refractive silicon is removed in the vicinity of this ‘cantilever’ waveguide. The surrounding material can be either air or a low index contrast polymer. Mode sizes of 4-9 μm can be achieved with this technique. To date this technique has been proposed specifically to couple light from a silicon photonics chip into a fiber.
Further, it is known from U.S. Pat. No. 6,282,345 B1 that light can be transferred from one waveguide to another waveguide on the same chip by engineering the respective widths of the waveguides. This approach has typically been used on III-V chips, where one layer is the active area and the other layer is a passive waveguide, which is more suited to coupling light into fiber.